NURBS Interpolation with FPGA Acceleration

NURBS are used mainly to represent 3D models, being included in standards like OpenGL (Phigs) and used in computer graphics and manufacturing systems, representing adequately, in a compact way, almost any shape. For this sake, NURBS algorithms are implemented in graphical processing units (GPUs) hardware, but its rigid processing architecture and power consumption makes it inadequate in embedded systems implementations. An alternative to this case, instead of another technologies like microcontrollers or dedicated integrated circuits, is the use of reconfigurable logic with FPGAs, more adequate to embedded systems in relation to GPUs. This work proposes a Soc System on a chip implementation, using FPGA and the Verilog sysnthesis language, aiming implement an embedded system for computer graphics NURBS interpolation tools and visualization.